In integrated circuit (IC) packaging, a ball grid array (BGA) has become one of the most popular packaging alternatives for input/output (I/O) devices in the industry. The electric coupling of an IC package to a power supply can be modeled as a resistance-inductance-capacitance circuit. A power supply loop circuit is formed from a series of conductive paths from a terminal of the power supply to the IC package and back from the IC package to the terminal of the power supply. An electrical characteristic of these conductors (e.g., resistance, capacitance and inductance) may be determined by the impedance of the loop circuit. Further, long bond wires determine the total impedance, conductance, and inductance of the connection. Hence, long bond wires may create a larger loop circuit for current paths, thereby increasing the inductance.
Typically, an integrated circuit package consists of a BGA substrate with two layers, an array of conductive balls, and a die mounted on the BGA substrate. In general, two-layer BGA substrates require long bond wires to couple power from the conductive balls to the die. Long bond wires often result in high-levels of stray inductance, further leading to a poor transmitted error vector magnitude (EVM). EVM is commonly used to quantify the performance of a digital radio transmitter or receiver. Hence, poor EVM may indicate reduced performance, reduced sensitivity, and negatively affected wireless signals.
One approach to solve the problem of poor EVM in a conventional two-layer BGA substrate is the inclusion of additional layers. This multi-layer design effectively stacks layers on top of each other to provide additional regions that may carry signals or power and may reduce the length of bond wires. Multi-layer BGA substrates therefore improve EVM performance by isolating conductive elements and reducing the need for long bond wires. However, the fabrication of multi-layer BGA substrates is relatively expensive in comparison to conventional two-layer designs. As a result, the solution offered by multi-layer designs is not ideal for most applications.
In addition, a well designed power distribution pattern is required for an IC package to provide a regulated power supply voltage over a wide range of frequencies. Unfortunately, even well designed power distribution patterns exhibit non-uniform impedance as a function of frequency. As high performance IC packages demand larger currents at higher frequencies with lower power supply voltages, power system design becomes increasingly more challenging. Accordingly, reductions in the impedance of the power distribution pattern, particularly inductive components are desired.
In the light of the foregoing discussion, there is a need for a lower-cost, lower-inductance, package design with improved EVM performance. Current designs are plagued with operational problems, especially when used in wireless applications over a wide range of frequencies. And given the current limitations on fabrication technology, multi-layer substrates are not cost-effective replacements for two-layer substrates.